Total Records: 26 - Showing maximum 50 Records per page
H1B Salary Details For SENIOR FPGA ENGINEER
H1B Salary Details For SENIOR FPGA ENGINEER has minimum salary 106500 and maximum salary 265000 from 26 records.
Employer
|
Job Title
|
City
|
Salary
|
Year
|
|
LITEPOINT CORPORATION
|
SENIOR FPGA ENGINEER
|
SAN JOSE, CA
|
180000 |
2023
|
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|
LITEPOINT CORPORATION
|
SENIOR FPGA ENGINEER
|
SAN JOSE, CA
|
180000 |
2023
|
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|
Atom Computing Inc
|
SENIOR FPGA ENGINEER
|
BERKELEY, CA
|
170000 |
2023
|
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|
TEKTRONIX INC
|
SENIOR FPGA ENGINEER
|
BEAVERTON, OR
|
120931 |
2023
|
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|
TEKTRONIX INC
|
SENIOR FPGA ENGINEER
|
BEAVERTON, OR
|
120931 |
2023
|
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|
CITADEL SECURITIES AMERICAS SERVICES LLC
|
SENIOR FPGA ENGINEER
|
CHICAGO, IL
|
265000 |
2022
|
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|
CTC TRADING GROUP LLC
|
SENIOR FPGA ENGINEER
|
NEW YORK, NY
|
227000 |
2022
|
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|
INTUITIVE SURGICAL OPERATIONS INC
|
SENIOR FPGA ENGINEER
|
SUNNYVALE, CA
|
175000 |
2022
|
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|
CTC TRADING GROUP LLC
|
SENIOR FPGA ENGINEER
|
NEW YORK, NY
|
137738 |
2022
|
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|
CANON MEDICAL RESEARCH USA INC
|
SENIOR FPGA ENGINEER
|
VERNON HILLS, IL
|
125445 |
2022
|
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|
VELODYNE LIDAR INC
|
SENIOR FPGA ENGINEER
|
ALAMEDA, CA
|
136000 |
2021
|
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|
VELODYNE LIDAR INC
|
SENIOR FPGA ENGINEER
|
ALAMEDA, CA
|
136000 |
2021
|
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|
VELODYNE LIDAR INC
|
SENIOR FPGA ENGINEER
|
ALAMEDA, CA
|
136000 |
2021
|
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|
ALPHA-NUMERO TECHNOLOGY SOLUTIONS
|
SENIOR FPGA ENGINEER
|
IRVINE, CA
|
130000 |
2021
|
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|
ALPHA-NUMERO TECHNOLOGY SOLUTIONS
|
SENIOR FPGA ENGINEER
|
IRVINE, CA
|
130000 |
2021
|
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|
ALPHA-NUMERO TECHNOLOGY SOLUTIONS
|
SENIOR FPGA ENGINEER
|
IRVINE, CA
|
130000 |
2021
|
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|
ALPHA-NUMERO TECHNOLOGY SOLUTIONS
|
SENIOR FPGA ENGINEER
|
IRVINE, CA
|
130000 |
2021
|
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|
CTC TRADING GROUP LLC
|
SENIOR FPGA ENGINEER
|
BROOKLYN, NY
|
200000 |
2020
|
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|
CTC TRADING GROUP LLC
|
SENIOR FPGA ENGINEER
|
CHICAGO, IL
|
200000 |
2020
|
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|
VELODYNE LIDAR INC
|
SENIOR FPGA ENGINEER
|
SAN JOSE, CA
|
150000 |
2020
|
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|
ALPHA-NUMERO TECHNOLOGY SOLUTIONS
|
SENIOR FPGA ENGINEER
|
IRVINE, CA
|
127000 |
2020
|
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|
TEKTRONIX INC
|
SENIOR FPGA ENGINEER
|
BEAVERTON, OR
|
115440 |
2020
|
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|
SODICK AMERICA CORPORATION
|
SENIOR FPGA ENGINEER
|
SAN JOSE, CA
|
106500 |
2020
|
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|
QUANTLAB FINANCIAL LLC
|
SENIOR FPGA ENGINEER
|
HOUSTON, TX
|
126006 |
2018
|
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|
QUANTLAB FINANCIAL LLC
|
SENIOR FPGA ENGINEER
|
HOUSTON, TX
|
121971 |
2017
|
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|
QUANTLAB FINANCIAL LLC
|
SENIOR FPGA ENGINEER
|
HOUSTON, TX
|
157000 |
2016
|
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|
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Footnotes:
1 Salary was noted as Weekly in DOL records. We are displaying 52 times weekly salary in the salary field.
2 Salary was noted as Bi-Weekly in DOL records. We are displaying 26 times bi-weekly salary in the salary field.
3 Salary was noted as Hourly in DOL records. We are displaying 365x8 times hourly salary in the salary field.
4 Salary was noted as Monthly in DOL records. We are displaying 12 times Monthly salary in the salary field.
5 We weren't able to extract salary information correctly from the in DOL records. Showing it as is.
All other cases salary was mentioned as yearly in DOL records and displayed as is.
All the salaries from DOL records might not include all the bonuses / benefits and other things which are paid. Use these salaries as reference.